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The NAND Boolean function has the property of functional completeness. This means, any Boolean expression can be re-expressed by an equivalent expression utilizing onlyNAND operations. For example, the function NOT(x) may be equivalently expressed as NAND(x,x). In the field of digital electronic circuits, this implies that we can implement any Boolean function using just NAND gates.

The mathematical proof for this was published by Henry M. Sheffer in 1913 in the Transactions of the American Mathematical Society (Sheffer 1913). A similar case applies to the NOR function, and this is referred to as NOR logic.

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NAND[edit]

A NAND gate is an inverted AND gate. It has the following truth table:

Q = A NAND B

Truth Table
Input AInput BOutput Q
001
011
101
110

Making other gates by using NAND gates[edit]

A NAND gate is a universal gate, meaning that any other gate can be represented as a combination of NAND gates. Ilife 13 download full dmg.

NOT[edit]

Download game earn to die 2012 part 2 for pc. A NOT gate is made by joining the inputs of a NAND gate together. Since a NAND gate is equivalent to an AND gate followed by a NOT gate, joining the inputs of a NAND gate leaves only the NOT gate.

Desired NOT GateNAND Construction
Q = NOT( A )= A NAND A
Truth Table
Input AOutput Q
01
10

AND[edit]

An AND gate is made by inverting the output of a NAND gate as shown below.

Desired AND GateNAND Construction
Q = A AND B= ( A NAND B ) NAND ( A NAND B )
Truth Table
Input AInput BOutput Q
000
010
100
111

OR[edit]

If the truth table for a NAND gate is examined or by applying De Morgan's Laws, it can be seen that if any of the inputs are 0, then the output will be 1. To be an OR gate, however, the output must be 1 if any input is 1. Therefore, if the inputs are inverted, any high input will trigger a high output.

Desired OR GateNAND Construction
Q = A OR B= ( A NAND A ) NAND ( B NAND B )
Truth Table
Input AInput BOutput Q
000
011
101
111

NOR[edit]

A NOR gate is an OR gate with an inverted output. Output is high when neither input A nor input B is high.

Desired NOR GateNAND Construction
Q = A NOR B= [ ( A NAND A ) NAND ( B NAND B ) ] NAND
[ ( A NAND A ) NAND ( B NAND B ) ]
Truth Table
Input AInput BOutput Q
001
010
100
110

XOR[edit]

An XOR gate is made by connecting four NAND gates as shown below. This construction entails a propagation delay three times that of a single NAND gate.

Desired XOR GateNAND Construction
Q = A XOR B= [ A NAND ( A NAND B ) ] NAND
[ B NAND ( A NAND B ) ]
Truth Table
Input AInput BOutput Q
000
011
101
110

Alternatively, an XOR gate is made by considering the disjunctive normal formAB¯+A¯B{displaystyle Acdot {overline {B}}+{overline {A}}cdot B}, noting from de Morgan's Law that a NAND gate is an inverted-input OR gate. This construction uses five gates instead of four.

Desired GateNAND Construction
Q = A XOR B= [ B NAND ( A NAND A ) ] NAND
[ A NAND ( B NAND B ) ]

XNOR[edit]

An XNOR gate is made by considering the disjunctive normal formAB+A¯B¯{displaystyle Acdot B+{overline {A}}cdot {overline {B}}}, noting from de Morgan's Law that a NAND gate is an inverted-input OR gate. This construction entails a propagation delay three times that of a single NAND gate and uses five gates.

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Desired XNOR GateNAND Construction
Q = A XNOR B= [ ( A NAND A ) NAND ( B NAND B ) ] NAND
( A NAND B )
Input AInput BOutput Q
001
010
100
111

Alternatively, the 4-gate version of the XOR gate can be used with an inverter. This construction has a propagation delay four times (instead of three times) that of a single NAND gate.

Desired GateNAND Construction
Q = A XNOR B= { [ A NAND ( A NAND B ) ] NAND
[ B NAND ( A NAND B ) ] } NAND
{ [ A NAND ( A NAND B ) ]
NAND [ B NAND ( A NAND B ) ] }

MUX[edit]

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A multiplexer or a MUX gate is a three-input gate that uses one of the inputs, called the selector bit, to select one of the other two inputs, called data bits, and outputs only the selected data bit.[1]

Desired MUX GateNAND Construction
Q = [ A AND NOT( S ) ]
OR ( B AND S )
= [ A NAND ( S NAND S ) ]
NAND ( B NAND S )
Truth Table
Input AInput BSelectOutput Q
0000
0100
1001
1101
0010
0111
1010
1111

DEMUX[edit]

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A demultiplexer performs the opposite function of a multiplexer: It takes a single input and channels it to one of two possible outputs according to a selector bit that specifies which output to choose.[1]

Desired DEMUX GateNAND Construction
Truth Table
InputSelectOutput AOutput B
0000
1010
0100
1101

See also[edit]

  • Sheffer stroke - other name
  • NOR logic. Like NAND gates, NOR gates are also universal gates.

External links[edit]

  • TTL NAND and AND gates - All About Circuits

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References[edit]

  1. ^ abNisan, N. & Schocken, S., 2005. In: From NAND to Tetris: Building a Modern Computer from First Principles. s.l.:The MIT Press, p. 20. Available at: http://www.nand2tetris.org/chapters/chapter%2001.pdfArchived 2017-01-10 at the Wayback Machine
  • Lancaster, Don (1974). TTL Cookbook (1st ed.). Indianapolis, IN: Howard W Sams. pp. 126–135. ISBN0-672-21035-5.
  • Sheffer, H. M. (1913), 'A set of five independent postulates for Boolean algebras, with application to logical constants', Transactions of the American Mathematical Society, 14: 481–488, doi:10.2307/1988701, JSTOR1988701
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